Each CPU has dedicated local memory regions including Data Scratch-Pad SRAM (DSPR), Program Scratch-Pad SRAM (PSPR), Data Cache SRAM (DCACHE), Program Cache SRAM (PCACHE), and Cache TAG SRAM.
| Address Range | Size | Description | Access Type: Read | Access Type: Write |
|---|
| 1000 0000H - 1001 7FFFH | 96 Kbyte | CPU5 Data Scratch-Pad SRAM (CPU5 DSPR) | Access | Access |
| 1001 8000H - 1001 BFFFH | 16 Kbyte | CPU5 Data Cache SRAM (CPU5 DCACHE) | Access² / SRIBE | Access² / SRIBE |
| 1001 C000H - 100B FFFFH | - | Reserved | SRIBE | SRIBE |
| 100C 0000H - 100C 17FFH | - | CPU5 Data Cache TAG SRAM (CPU5 DTAG) | Access² / SRIBE | Access² / SRIBE |
| 100C 1800H - 100F FFFFH | - | Reserved | SRIBE | SRIBE |
| 1010 0000H - 1010 FFFFH | 64 Kbyte | CPU5 Program Scratch-Pad SRAM (CPU5 PSPR) | Access | Access |
| 1011 0000H - 1011 7FFFH | 32 Kbyte | CPU5 Program Cache SRAM (CPU5 PCACHE) | Access² / SRIBE | Access² / SRIBE |
| 1011 8000H - 101B FFFFH | - | Reserved | SRIBE | SRIBE |
| 101C 0000H - 101C 2FFFH | - | CPU5 Program Cache TAG SRAM (CPU5 PTAG) | Access² / SRIBE | Access² / SRIBE |
| 101C 3000H - 1FFF FFFFH | - | Reserved | SRIBE | SRIBE |
| Address Range | Size | Description | Access Type: Read | Access Type: Write |
|---|
| 3000 0000H - 3001 7FFFH | 96 Kbyte | CPU4 Data Scratch-Pad SRAM (CPU4 DSPR) | Access | Access |
| 3001 8000H - 3001 BFFFH | 16 Kbyte | CPU4 Data Cache SRAM (CPU4 DCACHE) | Access² / SRIBE | Access² / SRIBE |
| 3001 C000H - 300B FFFFH | - | Reserved | SRIBE | SRIBE |
| 300C 0000H - 300C 17FFH | - | CPU4 Data Cache TAG SRAM (CPU4 DTAG) | Access² / SRIBE | Access² / SRIBE |
| 300C 1800H - 300F FFFFH | - | Reserved | SRIBE | SRIBE |
| 3010 0000H - 3010 FFFFH | 64 Kbyte | CPU4 Program Scratch-Pad SRAM (CPU4 PSPR) | Access | Access |
| 3011 0000H - 3011 7FFFH | 32 Kbyte | CPU4 Program Cache SRAM (CPU4 PCACHE) | Access² / SRIBE | Access² / SRIBE |
| 3011 8000H - 301B FFFFH | - | Reserved | SRIBE | SRIBE |
| 301C 0000H - 301C 2FFFH | - | CPU4 Program Cache TAG SRAM (CPU4 PTAG) | Access² / SRIBE | Access² / SRIBE |
| 301C 3000H - 3FFF FFFFH | - | Reserved | SRIBE | SRIBE |
| Address Range | Size | Description | Access Type: Read | Access Type: Write |
|---|
| 4000 0000H - 4001 7FFFH | 96 Kbyte | CPU3 Data Scratch-Pad SRAM (CPU3 DSPR) | Access | Access |
| 4001 8000H - 4001 BFFFH | 16 Kbyte | CPU3 Data Cache SRAM (CPU3 DCACHE) | Access² / SRIBE | Access² / SRIBE |
| 4001 C000H - 400B FFFFH | - | Reserved | SRIBE | SRIBE |
| 400C 0000H - 400C 17FFH | - | CPU3 Data Cache TAG SRAM (CPU3 DTAG) | Access² / SRIBE | Access² / SRIBE |
| 400C 1800H - 400F FFFFH | - | Reserved | SRIBE | SRIBE |
| 4010 0000H - 4010 FFFFH | 64 Kbyte | CPU3 Program Scratch-Pad SRAM (CPU3 PSPR) | Access | Access |
| 4011 0000H - 4011 7FFFH | 32 Kbyte | CPU3 Program Cache SRAM (CPU3 PCACHE) | Access² / SRIBE | Access² / SRIBE |
| 4011 8000H - 401B FFFFH | - | Reserved | SRIBE | SRIBE |
| 401C 0000H - 401C 2FFFH | - | CPU3 Program Cache TAG SRAM (CPU3 PTAG) | Access² / SRIBE | Access² / SRIBE |
| 401C 3000H - 4FFF FFFFH | - | Reserved | SRIBE | SRIBE |
| Address Range | Size | Description | Access Type: Read | Access Type: Write |
|---|
| 5000 0000H - 5001 7FFFH | 96 Kbyte | CPU2 Data Scratch-Pad SRAM (CPU2 DSPR) | Access | Access |
| 5001 8000H - 5001 BFFFH | 16 Kbyte | CPU2 Data Cache SRAM (CPU2 DCACHE) | Access² / SRIBE | Access² / SRIBE |
| 5001 C000H - 500B FFFFH | - | Reserved | SRIBE | SRIBE |
| 500C 0000H - 500C 17FFH | - | CPU2 Data Cache TAG SRAM (CPU2 DTAG) | Access² / SRIBE | Access² / SRIBE |
| 500C 1800H - 500F FFFFH | - | Reserved | SRIBE | SRIBE |
| 5010 0000H - 5010 FFFFH | 64 Kbyte | CPU2 Program Scratch-Pad SRAM (CPU2 PSPR) | Access | Access |
| 5011 0000H - 5011 7FFFH | 32 Kbyte | CPU2 Program Cache SRAM (CPU2 PCACHE) | Access² / SRIBE | Access² / SRIBE |
| 5011 8000H - 501B FFFFH | - | Reserved | SRIBE | SRIBE |
| 501C 0000H - 501C 2FFFH | - | CPU2 Program Cache TAG SRAM (CPU2 PTAG) | Access² / SRIBE | Access² / SRIBE |
| 501C 3000H - 5FFF FFFFH | - | Reserved | SRIBE | SRIBE |
| Address Range | Size | Description | Access Type: Read | Access Type: Write |
|---|
| 6000 0000H - 6003 BFFFH | 240 Kbyte | CPU1 Data Scratch-Pad SRAM (CPU1 DSPR) | Access | Access |
| 6003 C000H - 6003 FFFFH | 16 Kbyte | CPU1 Data Cache SRAM (CPU1 DCACHE) | Access² / SRIBE | Access² / SRIBE |
| 6004 0000H - 600B FFFFH | - | Reserved | SRIBE | SRIBE |
| 600C 0000H - 600C 17FFH | - | CPU1 Data Cache TAG SRAM (CPU1 DTAG) | Access² / SRIBE | Access² / SRIBE |
| 600C 1800H - 600F FFFFH | - | Reserved | SRIBE | SRIBE |
| 6010 0000H - 6010 FFFFH | 64 Kbyte | CPU1 Program Scratch-Pad SRAM (CPU1 PSPR) | Access | Access |
| 6011 0000H - 6011 7FFFH | 32 Kbyte | CPU1 Program Cache SRAM (CPU1 PCACHE) | Access² / SRIBE | Access² / SRIBE |
| 6011 8000H - 601B FFFFH | - | Reserved | SRIBE | SRIBE |
| 601C 0000H - 601C 2FFFH | - | CPU1 Program Cache TAG SRAM (CPU1 PTAG) | Access² / SRIBE | Access² / SRIBE |
| 601C 3000H - 6FFF FFFFH | - | Reserved | SRIBE | SRIBE |
| Address Range | Size | Description | Access Type: Read | Access Type: Write |
|---|
| 7000 0000H - 7003 BFFFH | 240 Kbyte | CPU0 Data Scratch-Pad SRAM (CPU0 DSPR) | Access | Access |
| 7003 C000H - 7003 FFFFH | 16 Kbyte | CPU0 Data Cache SRAM (CPU0 DCACHE) | Access² / SRIBE | Access² / SRIBE |
| 7003 C000H - 700B FFFFH | - | Reserved | SRIBE | SRIBE |
| 700C 0000H - 700C 17FFH | - | CPU0 Data Cache TAG SRAM (CPU0 DTAG) | Access² / SRIBE | Access² / SRIBE |
| 700C 1800H - 700F FFFFH | - | Reserved | SRIBE | SRIBE |
| 7010 0000H - 7010 FFFFH | 64 Kbyte | CPU0 Program Scratch-Pad SRAM (CPU0 PSPR) | Access | Access |
| 7011 0000H - 7011 7FFFH | 32 Kbyte | CPU0 Program Cache SRAM (CPU0 PCACHE) | Access² / SRIBE | Access² / SRIBE |
| 7011 8000H - 701B FFFFH | - | Reserved | SRIBE | SRIBE |
| 701C 0000H - 701C 2FFFH | - | CPU0 Program Cache TAG SRAM (CPU0 PTAG) | Access² / SRIBE | Access² / SRIBE |
| 701C 3000H - 7FFF FFFFH | - | Reserved | SRIBE | SRIBE |
Notes:
- CPU5 has 96 Kbyte DSPR and 64 Kbyte PSPR (different from other CPUs which have 240 Kbyte DSPR)
- All TAG SRAMs require 32-bit data access and 64-bit aligned addresses
- Access²: Conditional access based on specific hardware configurations